Performance analysis of the quantum processor: based on reversible shift register using QCA

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Publicado en 3C Tecnología. Edición Especial/Special Issue – Abril/April 2020



The concept of the reversible logic depends on the dominant modules of a processor that has motivated to obtain the performance analysis of the quantum based processors. In continuation to this discussion, the shift register can be studied with the use of the reversible logic which is capable of shifting the bits of the information towards both side i.e. left and right. In this process of the analysis of the quantum processor, the Quantum Computational Automata (QCA) as well as Verilog, software has been used so as to simulate the parameters of the device and then obtain the characteristics of the device. In this discussion, a reversible logical computing based approach has been mentioned that can be used in the ALU of a quantum processor with the help of D-type FFs or its combination that act as an inevitable and the most crucial basic building block in the design of quantum processor. This circuit has been designed and analyzed for the most dominant parameters, say, size of cell, number of cells used, delay, temperature dependency, power dissipation, etc. This proposed circuit which acts as an alternative to the CMOS technology, has been analyzed for a typical range of the power dissipation (650 – 750 meV), temperature range (1ºK – 10ºK).


Palabras clave

QCA, CMOS, Power Dissipation, QCA Well, Shift Register, Reversible Logic Computation, Quantum Processor.

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