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DISCONTINUOUS CONDUCTION MODE BUCK
CONVERTER WITH HIGH EFFICIENCY
Abdul Hakeem Memon
IICT, Mehran UET, Jamshoro, Sindh, (Pakistan).
E-mail: hakeem.memon@faculty.muet.edu.pk
ORCID: https://orcid.org/0000-0001-8545-3823
Rizwan Ali
IICT, Mehran UET, Jamshoro, Sindh, (Pakistan).
E-mail: rizwanalimemon26@gmail.com
ORCID: https://orcid.org/0000-0002-3022-6356
Zubair Ahmed Memon
IICT, Mehran UET, Jamshoro, Sindh, (Pakistan).
E-mail: zubair.memon@faculty.muet.edu.pk
ORCID: https://orcid.org/0000-0001-5967-3152
Recepción:
30/11/2020
Aceptación:
09/02/2021
Publicación:
07/05/2021
Citación sugerida:
Memon, A. H., Ali, R., y Memon, Z. A. (2021). Discontinuous Conduction Mode Buck Converter
with High Eciency. 3C Tecnología. Glosas de innovación aplicadas a la pyme, Edición Especial, (mayo 2021),
35-51. https://doi.org/10.17993/3ctecno.2021.specialissue7.35-51
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ABSTRACT
Electronic devices require AC to DC converter (rectier) to convert AC voltage from the
grid to DC voltage for the electronics and its result is low power factor (PF) and harmonic
current injection into the system. Nowadays, power factor correction (PFC) converters are
being widely used which can achieve high power factor (PF) and reduce the harmonics
caused during AC to DC conversion and buck PFC converter is one of mostly used converter.
On the other hand, if this converter works with constant duty-cycle (CDC) control scheme,
the overall losses are more and eciency is less. In order to increase the eciency of buck
converter operating in discontinuous conduction mode (DCM), a variable duty-cycle (VDC)
control scheme is proposed. The method of tting VDC control scheme is given for making
implementation of circuit simpler. The performance of buck converter is compared with
CDC and VDC control scheme in terms of eciency. For verifying the validity of proposed
technique, the simulation results are carried out. The object of the research paper is to
propose the control scheme to achieve high PF for DCM buck converter by only modulating
the duty-cycle of buck switch.
KEYWORDS
Variable Duty-Cycle (VDC), Constant Duty-Cycle (CDC), Discontinuous Conduction
Mode (DCM), Electromagnetic Interference (EMI), Duty-Cycle, Buck Converter.
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1. INTRODUCTION
Electronic devices require AC to DC converter (rectier) to convert AC voltage from the
grid to DC voltage for the electronics and its result is low power factor (PF) and harmonic
current injection into the system. Nowadays, power factor correction (PFC) converters are
being widely used which can achieve high power factor (PF) and reduce the harmonics
caused during AC to DC conversion (Praneeth & Williamson, 2018; Williamson, Rathore
& Musavi, 2015; Nussbaumer et al., 2019; Anwar et al., 2017; Al Gabri, Fardoun & Ismail,
2015; Badawy, Sozer & De Abreu-Garcia, 2016; Memon et al., 2019a, 2019b, 2019c, 2019d,
2019e).
Power factor correction can be of two types: active PFC and passive PFC. Active PFC can
be achieved by using passive elements like inductors, capacitors and inductors and passive
PFC can be achieved by using electronic circuits with active switches like insulated gate
bipolar junction transistor (IGBT) and metal oxide semiconductor eld eect transistor
(MOSFET), etc. To obtain the good value of power factor and meet the standards like
IEC61000-3-2 and IEEE 519, active power factor correction (PFC) techniques are used.
DC to DC converters used as power factor correction circuits with the help of active
switches shape the value of supply current which not only improves the PF, but also reduce
the harmonics. Among DC-DC converters, DCM buck PFC is generally utilized in many
applications because of various advantages like maintaining high eciency for the wide
range of input voltage, cost reduction, low output voltage, protection against inrush current
life time improvement and easy design of electromagnetic interference (EMI) lter The
major drawback of the buck converter is its PF is low and eciency is also low, especially
when operated with constant duty-cycle control scheme (CDCCS).
For modifying the performance of traditional buck converter, various research has proposed
various topologies and control schemes (Endo, Yamashita & Sugiura, 1992; Lee, Wang &
Hui, 1997; Spiazzi & Buso, 2000; Huber, Gang & Jovanovic, 2011; Jang & Jovanović, 2011;
Lamar et al., 2012; Ki & Lu, 2013; Al Gabri, Fardoun & Ismail, 2015; Memon et al., 2016;
Memon et al., 2017; Memon et al., 2018a, 2018b; Memon et al., 2019a, 2019b, 2019c,
2019d, 2019e; Liu et al., 2020).
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Most of the work in the literature is done to improve the PF of the buck converter. The
purpose of this paper is to introduce the control scheme which can improve the eciency
of DCM buck converter.
In this paper, a variable duty-cycle control scheme (VDCCS) is introduced for DCM buck
converter to reduce peak and rms current of inductor and hence ultimately enhancing its
eciency.
This paper is divided into six sections. In section 2, the operation states of DCM buck
converter are analyzed with traditional CDCCS strategy. The introduced VDCCS is
discussed in section 3. Then the comparative analysis is discussed in section 4 in terms of
eciency. In section 5, the eectiveness of proposed topology is evaluated by simulation
results. Finally, some conclusions are drawn in section 6.
2. RESEARCH METHODOLOGY
The research methodology is based on:
1. Mathematical analysis of the operating principle of the control schemes for DCM
Buck converter with the help of MATHCAD converter.
2. Introducing the proposed control scheme to obtain high eciency
3. Realization of control scheme through control blocks.
4. Comparative analysis of the converter for CDCC and VDCC strategy
5. Developing the simulation model of DCM Buck converter with the help of MATLAB
software
6. Conrming the results.
3. CONVENTIONAL CDC CONTROL SCHEME FOR BUCK
CONVERTER
Figure 1(b) shows the main circuit of a buck converter with CDC control scheme.
The input voltage before and after the bridge are given as
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Figure 1. Buck converter with CDC control scheme.
Source: (Yao et al., 2017).
(1)
Where V
rms
is the rms value.
There are three switching cycles when buck converter works in discontinuous conduction
mode (DCM).
When Q
b
conducts, the inductor is getting charge from supply voltage in rst switching cycle
as depicted in Figure 2.
Figure 2. Buck converter during rst switching cycle.
Source: (Yao et al., 2017).
The peak current of inductor i
L_pk
is given as
(2)
Where D
on
is the duty-cycle of during turn on time of switch
When Q
b
is o, inductor is discharging through load and output capacitor, as shown in in
Figure 3. It occurs in second switching cycle
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Figure 3. Buck converter during second switching cycle.
Source: (Yao et al., 2017).
The peak current of inductor i
L_pk
is
(3)
By using the information of volt-second balance, following expression is obtained
(4)
From (2) and (4), the following relation is obtained
(5)
During third switching cycle, output capacitor is discharged through load as shown in
Figure 4.
Figure 4. Buck converter during third switching cycle.
Source: (Yao et al., 2017).
The value of average input current for buck converter is got as
(6)
For complete half cycle, input current is expressed as
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(7)
Based on (1) and (7), the input power of the buck converter is expressed as
(8)
Now D
on
can be calculated by assuming the eciency of buck converter as 100%
(9)
4. PROPOSED VDC CONTROL SCHEME FOR BUCK CONVERTER
FOR EFFICIENCY IMPROVEMENT
4.1. VDC CONTROL SCHEME FOR EFFICIENCY IMPROVEMENT
For obtaining, high eciency, the variation rule for duty-cycle must be
(10)
Where Dc is a co-ecient,
By substituting the value of D
on
in (6), we obtain
(11)
The average value of input power with VDC control scheme is expressed as
(12)
The value of D
c
is got from (12) as
(13)
By substituting the value of D
c
in (11), we get
(14)
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4.2. FITTING VDC CONTROL SCHEME
For the implementation of Don_vdccs, it is essential to remove squire root term from (14).
Because it is dicult to realize to it by using analogue circuits.
Dening a=V
m
/V
o
, y=sinθ, eq. (14) can be simplied as
(15)
Eq. 15 can be rewritten as
(16)
The average input current with VDCCS is given as
(17)
5. EFFICIENCY COMPARISON
5.1. LOSS DUE TO BRIDGE DIODE RECTIFIER
The loss caused by bridge diode rectier is calculated as below
(18(a))
(18(b))
KBL10 is adopted as the rectier bridge, whose forward voltage drop VFD is 0.9 V.
The input current with CDC control scheme and VDC control scheme is given as
(19(a))
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(19(b))
5.2. CONDUCTION LOSSES OF THE SWITCHES
The rms current of the on time period, i.e., the rms current of switch Q
b
can be got as
(20)
The rms current of the o time period can be determined as
(21)
While Q
b
is on and o, the current ows through the winding of the inductor, whose rms
current is
(22(a))
(22(b))
The losses due to conduction of switches can be got as
(23(a))
(23(b))
The value of R
DS(On)
0.19 Ω which is found from datasheet of 20N60C3.
5.3. LOSSES DUE TURN OFF SWITCHES
The loss caused by turning o the switch with CDC control scheme and VDC control
scheme is calculated as
(24(a))
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(24(b))
Where t
f
value is 12ns for CMOS 20N60C.
5.4. THE LOSS CAUSED BY COPPER OF THE INDUCTOR
The inductor’s copper loss with CDCCS and VDCCS can be found below as
(25(a))
(25(b))
Where R
copper(Lf)
is 0.16 and R
copper(Hf)
is 0.23.
The low frequency and high frequency of rms current can be found out by using below
formula
(26(a))
(26(b))
(26(c))
5.5. LOSS DUE TO CORE OF THE INDUCTOR
The loss caused by core of inductor with CDCCS and VDCCS is calculated as
(27(a))
(27(b))
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(27(c))
(27(d))
The value of core parameters can be found from [24].
5.6. THE LOSS DUE TO CONDUCTION OF THE FREEWHEELING DIODE
The conduction loss due to freewheeling diode with CDC and VDC control scheme is
(28(a))
(28(b))
The value of VFD is 0.67 for MUR 860 diode.
5.7. THE EFFICIENCY COMPARISON
The eciency of DCM buck converter with CDC and VDC control scheme can be
calculated as
(29(a))
(29(b))
From above equations and parameters of converter, the theoretical eciency of converter
with CDC and VDC control scheme is calculated and compared as shown in Figure 5. It
can be concluded that eciency of DCM buck converter has improved in case of VDC
control scheme.
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Figure 5. Efciency at universal input voltage. Mathcad eq: (16-29).
6. SIMULATION RESULTS
For verifying the eectiveness of VDCCS strategy, simulations are carried out. The input
voltage range is 90-264VAC, and the output is 80V. For ensuring the current to be in
DCM, UC3525A IC is used. All the components in the circuit are selected as idea.
Figure 6 and Figure 7 show the simulation waveforms of input voltage, input current and
output voltage of DCM buck converter with CDCCS and VDCCS at 220VAC inputs,
respectively. It can be seen that the input current with VDCCS has less peaks as compared
to input current with CDCCS is more sinusoidal as compared with CDCC.
Figure 6. v
o
, and v
in
, i
in
with CDC control scheme [Simulation waveform from Saber Software].
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Figure 7. v
o
, and v
in
, i
in
with VDC control scheme [Simulation waveform from Saber Software].
7. CONCLUSIONS
Electronic devices require AC to DC converter (rectier) to convert AC voltage from the
grid to DC voltage for the electronics and its result is low power factor (PF) and harmonic
current injection into the system. Nowadays, power factor correction (PFC) converters are
being widely used which can achieve high power factor (PF) and reduce the harmonics
caused during AC to DC conversion and discontinuous conduction mode (DCM) buck
PFC converter is one of mostly used converter. The DCM buck converter is generally
utilized in many applications because of various advantages like maintaining high eciency
for the wide range of input voltage, cost reduction, low output voltage, protection against
inrush current and life time improvement. However, its eciency is low when operated with
constant duty-cycle control scheme. For increasing the eciency and ultimately reducing
the losses of the DCM buck converter, a variable duty-cycle control scheme has been
introduced. Fitting duty-cycle method is also discussed to make circuit implementation
easier. For verifying the validity of proposed technique, the simulation results are carried
out.
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