ACHIEVING HIGH INPUT POWER FACTOR
FOR DCM BUCK PFC CONVERTER BY
VARIABLE DUTY-CYCLE CONTROL
A. Hakeem Memon
IICT, Mehran UET, Jamshoro.
E-mail: hakeem.memon@faculty.muet.edu.pk
M. Osama Nizamani
IICT, Mehran UET, Jamshoro.
E-mail: osama12el118@gmail.com
Anwar A. Memon
IICT, Mehran UET, Jamshoro.
E-mail: anwar.memon@faculty.muet.edu.pk
Zubair A. Memon
IICT, Mehran UET, Jamshoro.
E-mail: zubair.memon@faculty.muet.edu.pk
Amir M. Soomro
IICT, Mehran UET, Jamshoro.
E-mail: amir.soomro@faculty.muet.edu.pk
Recepción: 31/07/2019 Aceptación: 20/09/2019 Publicación: 06/11/2019
Citación sugerida:
Memon, A.H., Nizamani, M.O., Memon, A.A., Memon, Z.A. y Soomro, A.M. (2019).
Achieving high input power factor for DCM Buck PFC converter by variable Duty-Cycle
Control. 3C Tecnología. Glosas de innovación aplicadas a la pyme. Edición Especial, Noviembre
2019, 185-199. doi: http://dx.doi.org/10.17993/3ctecno.2019.specialissue3.185-199
Suggested citation:
Memon, A.H., Nizamani, M.O., Memon, A.A., Memon, Z.A. & Soomro, A.M. (2019).
Achieving high input power factor for DCM Buck PFC converter by variable Duty-Cycle
Control. 3C Tecnología. Glosas de innovación aplicadas a la pyme. Speciaal Issue, November 2019,
185-199. doi: http://dx.doi.org/10.17993/3ctecno.2019.specialissue3.185-199
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ABSTRACT
Buck power factor correction (PFC) converter is widely used for a broad range of
AC/DC applications because of its many advantages However, the traditional
discontinuous conduction mode (DCM) buck power factor correction converter
(PFC) operates on constant duty-cycle control (CDCC) scheme, due to which its input
power factor (PF) is low. For improving PF near to unity, a variable-duty-cycle control
(VDCC) method has been proposed. Fitting duty-cycle method is also introduced to
make circuit implementation easier. For verifying the validity of proposed technique,
the simulation results are carried out.
KEYWORDS
Variable duty-cycle control (VDCC), Constant duty-cycle control (CDCC),
Discontinuous conduction mode (DCM), Power factor correction (PFC).
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1. INTRODUCTION
For achieving high power factor (PF) and low total harmonic distortion (THD),
power factor correction (PFC) converters are normally used in most of ac-dc power
conversion applications. PFC converters may be divided into active and passive
types. Active PFC converters have more advantages as compared to passive ones in
terms of high PF and small size (Memon, Yao, Chen, Guo, & Hu, 2017). Various
types of topologies and control schemes are available to implement the active PFC
techniques. Amongst them, buck PFC converter is a good choice especially for a
broad range of ac/dc applications due to its several advantages like high eciency,
cost reduction, low output voltage, and life time improvement. In literature, many
researchers (Memon et al., 2017-2019) have introduced buck PFC converter as a pre-
regulator. The buck ac-dc converter can overcome the disadvantages of the universal
input condition. On the other hand, if this converter works in hard switching mode,
switching losses will be higher especially at high input voltage that deteriorates
the advantages of buck converter (Chiang & Chen, 2009). The problem of hard
switching mode can be overcome by operating it in critical conduction mode (CRM)
or discontinuous conduction mode (DCM), which can provide zero voltage switching
(ZVS) and reduce reverse recovery losses in diode (Yang, Wu, Zhang, & Qian, 2010).
For modifying the performance of traditional buck converter, various researches
have proposed various techniques and control schemes.
Endo, Yamashita, and Sugiura (1992) have introduced a high PF buck converter.
Lee, Wang, and Hui (1997) have discussed modeling, analysis, and applications of
buck converter in discontinuous input voltage mode operation. Huber, Gang, and
Jovanovic (2010) have presented the performance evaluation on a clamped-current
buck PFC converter. Jang and Jovanović (2011) have introduced a bridgeless buck PFC
converter that substantially improves the eciency at low line. Wu et al. (2011) have
presented soft switched buck PFC converter operating with constant on-time control.
Lamar, Fernandez, Arias, Hernando, and Sebastian (2012) have presented a tapped-
inductor high-brightness light-emitting diode (HB-LED) AC/DC driver operating
in boundary conduction mode (BCM) for replacing incandescent bulb lamps. Wu et
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al. (2012) have put forward variable on-time control strategy to enhance the PF of
buck converter. Xie, Zhao, Zheng, and Liu (2013) have proposed a new topology to
enhance the PF. Yao et al., (2017) have proposed an injecting third harmonic method
to realize high PF. Memon et al. (2017) have proposed a variable control scheme for
integrated buck-yback converter to enhance input PF.
In this paper, a variable duty-cycle control (VDCC) strategy is introduced for
discontinuous conduction mode (DCM) buck converter to realize high input PF.
The analysis of the operating principle of buck converter is discussed with traditional
control (CDCC) scheme in Section 2. The VDCC is put forward in Section 3 to
attain high PF. In Section 4, simulation results are discussed, and the conclusion is
given in Section 5.
2. OPERATION ANALYSIS OF DCM BUCK PFC
CONVERTER
The gure 1 illustrates the schematic diagram of a DCM buck PFC converter.
D
1
D
2
D
3
D
4
v
in
i
in
EMI
Filter
C
o
L
b
Q
b
D
fw
V
o
R
Ld
Figure 1. Schematic diagram of a DCM buck PFC converter.
The instantaneous and rectied input voltage during half line cycle can be given as:
(1)
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Whereas V
m
represent the input voltage amplitude, θ represent the input voltage
angular frequency.
In switching cycle, peak current of inductor i
Lb_pk
is:
(2)
According to volt-second balance in the inductor:
(3)
Whereas D
y
represents duty-cycle, and T
s
represents switching cycle, V
o
represents
voltage output and D
R
represents duty-cycle during turn o time of switch.
Re arranging Eq. no (3) we get:
(4)
The average value of inductor current is:
(5)
The input current of the buck converter can be expressed as:
(6)
where θ0=arcsin Vo/Vm and Dy is constant.
The average input power with constant duty-cycle control (CDCC) is given as:
(7)
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Whereas, T
line
represent the line cycle.
Suppose the converter’s eciency is 100%, at that moment
the duty-cycle is:
(8)
The input power factor (PF) can be calculated from (6-8)
as:
(9)
PF
V
m
/V
o
2.766 3.111 3.457 3.803 4.148
0.970
0.975
0.980
0.985
0.990
Figure 2. Relationship among the input PF and a.
Where a=V
m
/V
o
The curve of input PF is drawn from (9) and is depicted in Figure 2. It can be
observed that when the V
m
/V
o
is greater, the PF is higher. When input voltage is
176VAC and output voltage is 90 V, at that time PF is 0.971. So, for achieving high
PF, a new control technique must be proposed.
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3. PROPOSE CONTROL SCHEME TO ENHANCE INPUT PF
3.1. VARIABLE DUTYCYCLE CONTROL TO REALIZE HIGH PF
For realizing unity PF, the variation rule for duty-cycle must be:
(10)
where D
o
is a co-ecient,
By replacing the value of D
y
in (7), we get:
(11)
Eq. (11) shows that input current is pure sinusoidal and hence unity PF can be
realized.
The average input power with proposed control scheme is given as:
(12)
From (13), D
0
can be obtained as:
(13)
By putting (13) into (11) leads to:
(14)
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3.2. THE FITTING DUTY CYCLE
The subtraction, multiplication, division and root operation included, the duty-
cycle expressed in (14) is complicated to be realized by analog circuit. Therefore, it is
necessary to simplify (14).
Dening a=V
m
/V
o
, y=sinθ, (14) can be rewritten as:
(15)
Based on Taylor’s series:
(16)
Eq. (16) can be expressed as:
(17)
Keeping rst derivative element, (17) is approximated as:
(18)
where
.
Substitution (18) into (6) and (7), respectively, leads to:
(19)
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(20)
From (19) and (20), input PF is calculated as:
(21)
If the input voltage range is 176-220 VAC, output voltage is 90 V. Replacing a =
176 2
/90 into (21), and dierentiating (21) with y
0
, also setting it to zero, y
0
=0.75 is
obtain.
Substituting y
0
=0.75 into (19), the expression of duty cycle is:
(22)
3.3. IMPLEMENTATION OF THE CONTROL CIRCUIT
The implementation of control circuit is presented in Figure 3. The dotted line
represents the variable-duty cycle scheme. The rectied input voltage is detected
by a voltage divider of R
1
and R
2
, and v
gf
= k
vg
V
m
sinθ, however k
vg
is the voltage
sensor gain. R
3
, D
1
, C
1
and R
4
are the circuit to gain the peak value of the rectied
input voltage, i.e., v
B
= k
vg
·V
m
. The output voltage is detected by a voltage divider
compared of R
5
and R
6
, the voltage sensor gain is deliberately set to 0.353k
vg
, so v
of
= 0.353k
vg
V
o
. Letting R
8
=1.125R
7
, then, and letting R
9
=R
10
=R
13
=R
14
, and R
12
=2.833
R
11
, then, the error amplier can be regulated by output voltage, the output voltage
can sense through a voltage divider of R
15
and R
16
related to reference voltage V
og
.
R
17
and C
2
form the compensation system. v
x
, v
z
and v
EA
are sent to the multiplier,
and
. v
P
is given to comparator and compared with the
sawtooth carrier, and the comparators output calculate the required duty-cycle,
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which changes as in eq. no (22), whereas v
EA
and sawtooth amplitude calculate the
coecient D
1
.
Through VDCC, the DCM buck PFC converter output voltage is operated at 90 V.
Now V
og
is set by 5V, then the output voltage sense gain can set at 1/18, i.e., R
15
=
17R
16
.
C
v
EA
xy
z
vv
v
�
v
x
v
y
v
z
R
7
v
o
R
5
R
6
R
8
+
_
+
_
R
15
R
16
R
17
C
2
V
og
v
of
+
_
+
_
2
1
9
R
S
Clock
PWM
Latch
Frequency
Divider
Comp
E/A
Q
b
11
14
D
2
D
3
UC3525A
P
D
R
9
R
10
R
13
R
14
+
_
A
+
_
v
g
R
1
R
2
v
gf
D
R
11
A of
B
vv
v
�
R
3
D
1
Feedforward Circuit
Multiplier
Multiplier
Error
Amplifier
+
_
B
C
1
R
4
Figure 3. Control circuit of the variable duty-cycle control.
4. ADVANTAGES OF PROPOSED CONTROL SCHEME
4.1. IMPROVEMENT OF THE INPUT PF
From (9) and (21), the input PF curves with a CDCC and a VDCC are drawn and are
depicted in Figure 4. It can be observed that VDCC improve the input PF. Once the
input voltage is set at 176 VAC, the PF is improved from 0.971 to 0.983.
constant duty
cycle control
variable duty
cycle control
176 198 220 242 264
V
m
/
2
0.96
0.97
0.98
0.99
1.0
0
0.971
0.983
Figure 4. Comparison of the input between proposed and traditional control.
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5. SIMULATION VERIFICATION
For verifying the eectiveness of VDCC strategy, simulations are carried out. The
input voltage range is 176-264VAC, and the output is 90V. For ensuring the current
to be in DCM, UC3525A IC is used. All the components in the circuit are selected
as idea.
Figure 5 and Figure 6 show the simulation waveforms of v
in
, i
in
, and v
o
of buck converter
with CDCC and VDCC at 176VAC inputs, respectively. It can be observed that the
input current with VDCC is more sinusoidal as compared with CDCC.
v
o
/V
v
in
/V
i
in
/A
80
95
-1.5
1.5
0
400
0
90
90
Figure 5. v
in
, i
in
, and v
o
with CDCC.
v
o
/V
v
in
/V
i
in
/A
80
95
-1.5
1.5
0
400
0
90
90
Figure 6. v
in
, i
in
, and v
o
with VDCC.
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6. CONCLUSION
With constant duty-cycle control, the input power factor of discontinues conduction
mode buck converter is low especially at low input voltages. A variable duty-cycle
control scheme and the implementation circuit are proposed to realize high power
factor. Simulation results are presented for the verication of the analysis.
REFERENCES
Chiang, C. Y., & Chen, C. L. (2009). Zero-voltage-switching control for a PWM
buck converter under DCM/CCM boundary. IEEE Transactions on Power Electronics,
24(9), 2120-2126. doi: https://doi.org/10.1109/TPEL.2009.2021186
Endo, H., Yamashita, T., & Sugiura, T. (1992). A high-power-factor buck
converter. PESC ‘92 Record. 23rd Annual IEEE Power Electronics Specialists Conference,
1071-1076 vol. 2. doi: https://doi.org/10.1109/PESC.1992.254766
Huber, L., Gang, L., & Jovanovic, M. M. (2010). Design-oriented analysis
and performance evaluation of buck PFC front end. IEEE Transactions on Power
Electronics, 25(1), 85-94. doi: https://doi.org/10.1109/TPEL.2009.2024667
Jang, Y., & Jovanović, M. M. (2011). Bridgeless high-power-factor buck converter.
IEEE Transactions on Power Electronics, 26(2), 602-611. doi: https://doi.org/10.1109/
TPEL.2010.2068060
Lamar, D. G., Fernandez, M., Arias, M., Hernando, M. M., & Sebastian, J.
(2012). Tapped-inductor buck HB-LED AC-DC driver operating in boundary
conduction mode for replacing incandescent bulb lamps. IEEE Transactions on Power
Electronics, 27(10), 4329-4337. doi: https://doi.org/10.1109/TPEL.2012.2190756
Lee, Y. S., Wang, S. J., & Hui, S. Y. R. (1997). Modeling, analysis, and application of
buck converters in discontinuous-input-voltage mode operation. IEEE Transactions
on Power Electronics, 12(2), 350-360. doi: https://doi.org/10.1109/63.558762
196
197
Edición Especial Special Issue Noviembre 2019
DOI: http://dx.doi.org/10.17993/3ctecno.2019.specialissue3.185-199
Memon, A. H., & Yao, K. (2018). UPC strategy and implementation for buck-
buck/boost PF correction converter. IET Power Electronics, 11(5), 884-894. doi:
https://doi.org/10.1049/iet-pel.2016.0919
Memon, A. H., Baloach, M. H., Sahito, A. A., Soomro, A. M., & Memon,
Z. A. (2018). Achieving High Input PF for CRM Buck-Buck/Boost PFC
Converter. IEEE Access, 6, 79082-79093. doi: https://doi.org/10.1109/
ACCESS.2018.2879804
Memon, A. H., Memon, Z. A., Shaikh, N. N., Sahito, A. A., & Hashmani, A.
A. (2019). Boundary conduction mode modied buck converter with low input
current total harmonic distortion. Indian Journal of Science and Technology, 12(17).
doi: https://doi.org/10.17485/ijst/2019/v12i17/144613
Memon, A. H., Pathan, A. A., Kumar, M., Sahito, A. A J., & Memon, Z. A.
(2019). Integrated buck-yback converter with simple structure and unity power
factor. Indian Journal of Science and Technology, 12(17). doi: https://doi.org/10.17485/
ijst/2019/v12i17/144612
Memon, A. H., Shaikh, N. N., Kumar, M., & Memon, Z. A. (2019). Buck-buck/
boost converter with high input power factor and non-oating output voltage.
International Journal of Computer Science and Network Security, 19(4), 299-304. Retrieved
from: http://paper.ijcsns.org/07_book/201904/20190442.pdf
Memon, A. H., Yao, K., Chen, Q., Guo, J., & Hu, W. (2017). Variable-on-time
control to achieve high input power factor for a CRM-integrated buck-yback
PFC converter. IEEE Transactions on Power Electronics, 32(7), 5312-5322. doi:
https://doi.org/10.1109/TPEL.2016.2608839
Wu, X., Yang, J., Zhang, J., & Qian, Z. (2011). Variable on-time (VOT)-controlled
critical conduction mode buck PFC converter for high-input AC/DC HB-LED
lighting applications. IEEE Transactions on power Electronics, 27(11), 4530-4539. doi:
https://doi.org/10.1109/TPEL.2011.2169812
198
199
3C Tecnología. Glosas de innovación aplicadas a la pyme. ISSN: 2254–4143
Wu, X., Yang, J., Zhang, J., & Xu, M. (2011). Design considerations of soft-
switched buck PFC converter with constant on-time (COT) control. IEEE
Transactions on Power Electronics, 26(11), 3144-3152. https://doi.org/10.1109/
TPEL.2011.2145391
Xie, X., Zhao, C., Zheng, L., & Liu, S. (2012). An improved buck PFC converter
with high power factor. IEEE Transactions on power electronics, 28(5), 2277-2284. doi:
https://doi.org/10.1109/TPEL.2012.2214060
Yang, J., Wu, X., Zhang, J., & Qian, Z. (2010). Design considerations of a high
eciency ZVS buck AC-DC converter with constant on-time control. Intelec 2010,
1-5. doi: https://doi.org/10.1109/intlec.2010.5525720
Yao, K., Zhou, X., Yang, F., Yang, S., Cao, C., & Mao, C. (2017). Optimum
third current harmonic during nondead zone and its control implementation to
improve PF for DCM buck PFC converter. IEEE Transactions on Power Electronics,
32(12), 9238-9248. doi: https://doi.org/10.1109/TPEL.2017.2657883
198
199
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DOI: http://dx.doi.org/10.17993/3ctecno.2019.specialissue3.185-199